Not known Details About Anti-Tamper Digital Clocks
Not known Details About Anti-Tamper Digital Clocks
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using the clock to set off an Appraise circuit that uses the plurality of delayed monotone signals to detect a clock fault.
Regardless of whether such operation is carried out as components or software is dependent on the particular software and style and design constraints imposed on the general process. Competent artisans may well apply the described performance in different approaches for every unique software, but these implementation choices should not be interpreted as creating a departure through the scope of the present invention.
five. The strategy for detecting clock tampering as outlined in declare four, wherein the drinking water stage number is set based on delayed monotone signals from a number of past clock evaluate time.
In other much more thorough facets of the creation, Each and every on the plurality of delayed monotone alerts 230 may be both a one particular or simply a zero. The Assess circuit 240 may possibly decide whether or not the number of types while in the plurality of delayed monotone indicators differs from a water level quantity by in excess of a predetermined threshold.
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SUMMARY An element of the present invention may well reside in a technique for detecting clock tampering. In the strategy a plurality of resettable hold off line segments are presented. Resettable hold off line segments concerning a resettable hold off line phase related to a bare minimum hold off time along with a resettable delay line phase linked to a optimum delay time are Every associated with discretely escalating delay periods.
The water degree amount may be decided according to delayed monotone indicators from a number of preceding Assess time 310. The plurality of resettable delay line segments may well comprise taps along a delay line. Alternatively, the plurality of resettable hold off line segments comprises parallel delay strains.
The approach from the creation may possibly detect faster- and slower-than-envisioned clock frequencies. What's more, it could detect a setup-time violation with the monotone sign to sense quicker than envisioned Anti-Tamper Digital Clocks frequencies or glitches. A substantial transform in the number of setup-time violations can be detected to supply an adaptive environment insensitive sensor.
19. The equipment for detecting clock tampering as outlined in claim eighteen, whereby the water level quantity is set based upon delayed monotone signals from one or more prior clock Consider time.
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In more comprehensive areas of the invention, the tactic may further incorporate resetting the resettable delay line segments in the course of a reset time period.
An additional facet of the invention may perhaps reside in an apparatus for detecting voltage tampering, comprising: implies for providing a monotone signal for the duration of an Examine time; signifies for delaying the monotone sign employing a plurality of resettable hold off line segments to crank out a respective plurality of delayed monotone signals possessing discretely growing delay instances involving a minimum amount hold off time and also a utmost delay time; and indicates for using the clock to cause an Consider circuit that employs the plurality of delayed monotone signals to detect a voltage fault.
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